1. Field
Exemplary embodiments of the present invention relate to a memory device, a memory system and a method for operating the memory device.
2. Description of the Related Art
A memory cell of a memory device is formed of a capacitor for storing a charge which is a data, and a transistor for switching the capacitor. The logic level of the data, which is high (logic level 1) or low (logic level 0), depends on accumulation of a charge in the capacitor, which means that the logic level of the data depends on the voltage of the capacitor.
Since the data is stored in the form of accumulated charges in the capacitor, theoretically there is no consumption of power. However, since the accumulated charges in the capacitor are discharged and the amount of the accumulated charges decreases due to current leakage caused by a PN bond of the transistor, the data may be lost without power supply. To prevent the data loss, the capacitor of the memory cell should be recharged repeatedly before the data stored in the capacitor is lost in order to retain the amount of charges. This process of repeatedly recharging the memory cell is referred to as a refresh operation.
The refresh operation is performed in the memory device in response to a refresh command applied from a memory controller. The memory controller applies the refresh command to the memory device repeatedly at a predetermined period taking into consideration a data retention time of the memory device. For example, when it is assumed that the data retention time of the memory device is approximately 64 ms then the entire memory cells in the memory device may be refreshed at about 8000 times of inputs of the refresh command. That is, the memory controller applies the refresh command to the memory device approximately 8000 times for approximately 64 ms to perform the refresh operation.
As the integration degree of the memory device is increased, the gap between multiple word lines included in the memory device is decreased and the coupling effect between the neighboring word lines is raised. For this reason, when a particular word line of the memory device is frequently activated, compared with the neighboring word lines during the refresh operation, the data of the memory cells coupled with a plurality of word lines adjacent to the particular word line may be damaged. This phenomenon is referred to as word line disturbance.